| PART |
Description |
Maker |
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| MC74VHCT74A06 MC74VHCU04DR2G MC74VHCU04DR2 MC74VHC |
Hex Inverter (Unbuffered)
Dual D?Type Flip?Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| 74LVC74ABQ 74LVC74ADB NXPSEMICONDUCTORS-74LVC74ABQ |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器；上升沿触
|
http://
NXP Semiconductors N.V.
|
| 74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器；上升沿触
|
NXP Semiconductors N.V.
|
| 74F50729 N74F50729N I74F50729D I74F50729N N74F5072 |
Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| MC74LVX74 MC74LVX74DT ON1600 MC74LVX74D MC74LVX74M |
From old datasheet system
LOW-VOLTAGE CMOS
DUAL D-TYPE FLIP-FLOP WITH SET AND CLEAR WITH 5V-TOLERANT INPUTS
|
MOTOROLA[Motorola, Inc]
ONSEMI[ON Semiconductor]
|
| MC74HC76 MC74HC76D MC74HC76N ON1498 |
From old datasheet system
DUAL JK FLIP-FLOP WITH SER AND RESET
Dual JK Flip-Flop With Set and Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP1G74GD 74AUP1G74GM125 |
Low-power D-type flip-flop with set and reset; positive-edge trigger
Low-power D-type flip-flop with set and reset; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors
|
